View LV7109E_3010341.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

n1611 sy pc 20110207-s00003 no.a1992-1/24 LV7109E overview the LV7109E is a rationalized ic of ac switch lv7108 complying with the europe scart standard. features and functions ? video/audio canal-sw ? 6db-videoamp ? 6mhz/12mhz/27m hz-lowpassfilter ? 9ch videodriver (av1/av2/line/rgb/component) ? v-sync. detection ? 3ch stereo audio input ? 2ch stereo audio output specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage 1 v cc 1 max 6.0 v maximum supply voltage 2 v cc 2 max 13.0 v recommended supply voltage 1 v cc 1 5.0 v recommended supply voltage 2 v cc 2 12.0 v operating supply range 1 v cc 1 opg 4.5 to 5.3 v operating supply range 2 v cc 2 opg 11.1 to 12.5 v allowable power dissipation pd max * with specified substrate 1070 mw operating temperature topr -20 to +75 c storage temperature tstg -40 to +150 c * with specified substrate : 76.1mm 114.3mm 1.6mm, glass epoxy. bi-cmos ic ac switch europe scart standard orderin g numbe r : ena1992 specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appli ances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliab ility and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-2/24 electrical characteristics at ta = 25c, v cc v = 5.0v, v cc a = 12v parameter symbol input point output point test condition ratings unit min typ max current dissipation 1 (5v) i cc 1 non-signal 69.7 82.0 94.3 ma current dissipation 2 (all5v) i cc 2 non-signal 11.1 13.0 15.0 ma current dissipation 3 (12v) i cc 3 non-signal 7.7 9.0 10.4 ma video canal sw part output voltage 1 vdcc 17 38 40 19 38 40 12 14 av1, av2-out (sync tip) 0.5 0.7 0.9 v voltage gain vgc v in = 1vp-p, f = 100khz, av1, av2-out 5.5 6.0 6.5 db frequency characteristics 1 vfc1 v in = 1vp-p, f = 10mhz/100khz (p17, p19: through) -1.0 0.0 +1.0 db frequency characteristics 2 vfc2 v in = 1vp-p, f = 6mhz/100khz (p38, p40: 6mhz-lpf) -1.5 0.0 +1.5 db dg differential gain dgc v in = video : 1vp-p -1 0 +1 % dp differential phase dpc v in = video : 1vp-p -1.5 0 +1.5 c cross talk between channel ctc selected input = gnd non-selected input = 1vp-p, f = 4.43mhz -60 -50 db picture s/n vsnc v in = video (50%white) -70 -65 db maximum output level 1 v o maxc1 17 19 12 14 output level (trough output) whose linearity exceeds 1% v in = linearity (lamp) signal output level at linearity 1% 2.8 3.0 vp-p maximum output level 2 v o maxc2 38 40 12 14 output level (enc output) whose linearity exceeds 1% v in = linearity (lamp) signal output level at linearity 1% 2.6 2.7 vp-p video input sw part output voltage 1 vdci1 17, 19, 21 35 composite (sync-tip) 0.8 1.0 1.2 v output voltage 2 vdci2 17, 19, 21 35 y (sync-tip) 0.8 1.0 1.2 v output voltage 3 vdci3 3 33 chroma (center) 1.8 2.1 2.4 v voltage gain 1 vgi1 17, 19, 21 3 33 35 v in = 1vp-p, f = 100khz, load = 10k -0.5 0.0 +0.5 db frequency characteristics vfi 17, 19, 21 3 33 35 v in = 1vp-p, f = 10mhz/100khz -1.0 0.0 +1.0 db dg differential gain dgsw 17, 19, 21 35 v in = video :1vp-p -1 0 +1 % dp differential phase dpsw 17, 19, 21 35 v in = video :1vp-p -1.5 0 +1.5 c cross talk between channel ctad 17, 19, 21 3 33 35 selected input = gnd non-selected input = 1vp-p, f = 4.43mhz -60 -50 db picture s/n vsnc 17, 19, 21 35 v in = video (50%white) -66 -60 db maximum output level v o maxsw 17, 19, 21 35 output level (enc output) whose linearity exceeds 1% v in = linearity (lamp) signal output level at linearity 1% 1.8 2.0 vp-p video driver part output voltage 1 vdcd1 64, 46 1, 44 3, 42 6 8 10 rgb (pedestal) 0.6 0.8 1.0 v output voltage 2 vdcd2 40 16 27 cvbs (sync tip) y (sync tip) 0.5 0.7 0.9 v output voltage 3 vdcd3 3 46 42 10 23 25 c, pr, pb (center) 1.7 2.0 2.3 v output voltage 4 vdcd4 40 27 y (sync tip) 0.8 1.0 1.2 v voltage gain 1 vgd1 64, 46 1, 44 3, 42 40, 38 6, 23 8, 27 10, 25 12, 14, 16 for v in = 1vp-p and f = 100khz line output only: 2 drives, other outputs: 1drive 5.5 6.0 6.5 db continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-3/24 continued from preceding page. parameter symbol input point output point test condition ratings unit min typ max frequency characteristics 1 vfd1 46, 44, 42 40, 38 6, 8, 10 23, 27, 25 12, 14 16 v in = 1vp-p, f = 6mhz/100khz when 6mhzlpf is selected -1.5 0.0 +1.5 db frequency characteristics 2 vfd2 46 44 42 6 8 10 f = 27mhz/100khz when 6mhzlpf is selected -35 -25 db frequency characteristics 3 vfd3 46 44 42 23 27 25 f = 12mhz/100khz when 12mhzlpf is selected -1.5 0.0 +1.5 db frequency characteristics 4 vfd4 46 44 42 23 27 25 f = 54mhz/100khz when 12mhzlpf is selected -40 -30 db frequency characteristics 5 vfd5 46 42 23 25 f = 13.5mhz/100khz when 13.5mhzlpf is selected -1.5 0.0 +1.5 db frequency characteristics 6 vfd6 46 42 23 25 f = 74mhz/100khz when 13.5mhzlpf is selected -40 -30 db frequency characteristics 7 vfd7 44 27 f = 25mhz/100khz when 27mhzlpf is selected -1.5 0.0 +1.5 db frequency characteristics 8 vfd8 44 27 f = 74mhz/100khz when 27mhzlpf is selected -40 -30 db group delay 1 vgdd1 46, 44, 42 40, 38 6, 8, 10 23, 27, 25 12, 14 16 f = 6mhz/100khz when 6mhzlpf is selected 20 35 ns group delay 2 vgdd2 46 44 42 23 27 25 f = 12mhz/100khz when 12mhzlpf is selected 14 25 ns group delay 3 vgdd3 46 42 23 25 f = 27mhz/100khz when 13.5mhzlpf is selected 10 18 ns group delay 4 vgdd4 44 27 f = 27mhz/100khz when 27mhzlpf is selected 10 18 ns mute attenuation vmud all v in = 1vp-p, f=4.43mhz -60 -50 db dg differential gain dg1 all v in = video : 1vp-p -1 0 +1 % dp differential phase dp1 all v in = video : 1vp-p -1.5 0 +1.5 c cross talk between channel ctd all v in = 1vp-p, f=4.43mhz driver output terminated with 75 -60 -50 db picture s/n vsnd all v in = video (50%white) -70 -65 db maximum output level 1 v o maxd1 64, 46 1, 44 3, 42 6 8 10 output level (rgb) whose linearity exceeds 1% v in = linearity (lamp) signal output level at linearity 1% 2.5 2.7 vp-p maximum output level 2 v o maxd2 40 16 27 output level (bright ness, cvbs) whose linearity exceeds 1% v in = linearity (lamp) signal output level at linearity 1% 2.6 2.8 vp-p maximum output level 3 v o maxd3 46 42 23 25 output level (color difference) whose linearity exceeds 1% v in = sin 10khz output level at linearity 1% 2.0 2.5 vp-p sync-sep part v.sync output high voltage vvsh 17, 19, 21 34 4.3 4.7 5.0 v v.sync output low voltage vvsl 17, 19, 21 34 0.0 0.3 0.6 v v.sync output delay time tdvs 17, 19, 21 34 note 2) 7 15 25 s v.sync output pulse width twvs 17, 19, 21 34 v in = pal video : 1vp-p note 2) 125 155 185 s note 2) when pin 10 is open continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-4/24 continued from preceding page. parameter symbol input point output point test condition ratings unit min typ max audio canal switches part maximum output level v o maxc r-ch. 49, 50, 51 l-ch. 54, 55, 56 r-ch. 58, 61 l-ch. 59, 62 av1, av2-out (l, r) output level at f = 1khz, thd = 1% bw = 400 to 30khz 2.2 2.5 vrms channel balance cvsw v in = 2vrms, f = 1khz lch gain-rch gain -1.5 0.0 +1.5 db total harmonic distortion thdac v in = 2vrms, f = 1khz, bw = 400 to 30khz 0.003 0.01 % output noise voltage vnac rg = 0 , bw = jis-a -100 -80 dbv mute attenuation vmuac v in = 2vrms, f = 1khz, bw = jis-a 20log (v out /v in ) -90 -75 db input impedance z in 80 100 120 k cross talk between channel and selctors ctsw v in = 2vrms, f = 1khz rg = 0 , bw = jis-a -110 -80 db output off set voltage v ofset off set voltage at the time of changeover sw. -20 0 +20 mv external control part i 2 c-bus high level input voltage v ih 36 37 2.5 v cc 5v i 2 c-bus low level input voltage v il 36 37 gnd 0.8 v fss output h voltage vhfss 7 seri al control select fss out h, load = 10k external output resistor 470 recommended 10.6 11.1 11.6 v fss output m voltage vmfss 7 seri al control select fss out m, load = 10k external output resistor 470 recommended 5.5 6.3 7.0 v fss output l voltage vlfss 7 seri al control select fss out, load = 10k 0.0 0.1 0.5 v fss risinge time tfsslh 7 1.0 ms fb output h voltage vhfb 18 serial control select fb out h, load = 150 3.0 4.0 5.0 v fb output l voltage vlfb 18 serial control select fb out l, load = 150 0.0 0.2 0.4 v fb external control l range vlfbin 20 18 pin 20 input voltage range at which the pin 18 output becomes ?l?. 0.0 0.5 v fb external control h range vhfbin 20 18 pin 20 input voltage range at which the pin 18 output becomes ?h?. 1.0 3.0 v external control output h voltage v exth 26 2k load for data 1 4.0 4.5 5.0 v external control output l voltage v extl 26 2k load for data 0 0.0 0.3 1.0 v internal reference regulator reg2.5v vreg25 2 31 2.3 2.5 2.7 v reg9.0v vreg90 52 57 8.7 9.0 9.3 v vre4.5 vreg45 48 4.3 4.5 4.7 v www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-5/24 package dimensions unit : mm (typ) 3159a audiopower supply block diagram sanyo : qip64e(14x14) 14.0 17.2 14.0 17.2 0.15 0.35 0.8 (2.7) 3.0max 0.1 0.8 (1.0) 116 17 32 33 48 49 64 switch buffer mute av2_r_out buf. 58 reg9v_ar buf. 52 v cc 12v_a 29 av1_r_in 51 av2_r_in 50 a-dac_r_in 100k 100k 100k 49 switch mute av1_r_out buf. 61 9v-reg. v cc 5v_all 28 power mute reg9v_al 57 9v-reg. ref4.5v r-ch circuit power supply r-ch input bias buf. r-ch output ref. l-ch circuit power supply 48 4.5v-ref. switch buffer mute av1_l_out buf. 62 buf. av1_l_in 56 av2_l_in 55 a-dac_l_in 100k 100k 100k 54 switch mute av2_l_out buf. 59 l-ch input bias buf. l-ch output ref. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-6/24 video power supply block diagram the thick line indicates the circuit operative in the power save mode. applied power to v cc 5_all, v cc 5v_sw and v cc _logic only in the power save mode. input bias/clamp v cc 5v_vd v cc 5v_rgb low pass filter switch rgb/ component gnd_vd gnd_rgb v cc 5v_vl v cc 5v_vc 6db. dr. gnd_vc gnd_vl v cc 5v_sw v cc 12v_a v cc 5v_logic v cc 5v_all serial ext-ctl gnd_sw gnd_logic 0db canal fb serial control 9 24 22 4 5 36 37 11 13 15 28 43 34 41 30 26 39 29 7 18 input bias/clamp low pass filter switch line output 6db. dr. input bias/clamp low pass filter v-sync. detector switch fb control fb output canal fss fss control fss output input bias/clamp switch adc output v-sync.output canal av1/av2 6db. dr. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-7/24 block diagram 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 7 11 2 + + + + clamp/ bias clamp/ bias bias serial control 6m 6m ref clamp/ bias reg clamp 12m/13.5m 12m/27m clamp clamp clamp clamp bias bias bias reg reg bias bias bias reg mute a-dac_r_in 1 f 22 f ref4.5v av2_r_in 1 f 2 av1_r_in reg9v_ar reg9v_al gnd_reg gnd_ar gnd_al 1 f 10 f + 10 f + 10 f 1k a-dac_l_in 1 f av2_b_in av2_g_in reg2.5v av2_r/c_in av1_b_out av1_fss_out av1_g_out gnd_vc v cc 5v_rgb v cc 5v_vc gnd_vl v cc 5v_vl v cc 5v_vl 0.1 f 0.1 f 15 7 0.1 f gnd_ref v cc 5v_sw gnd_v_sw gnd_logic scl_in sda_in y/v_adc v-sync._out c_adc 75 8 680 11 75 15 v_out(line) 75 19 av1_v\y_out 75 19 av2_v_out av1_r/c_out 75 75 1000 f 0.1 f 6 av2_l_in sync._sep._filter reg2.5v_all v cc 5v_logic v cc 12v_a v cc 5v_all v cc 5v_vd ext_ctl1 gnd_vd py_out(component) av2_r_out 1 f 6 1 + 10 f 1k av2_l_out 3 75 180k 1000 f 33pf 0.01 f av3_v_in av2_fb_in av2_v/y_in av1_fb_out av1_v_in 16 20 16 av1_l_in 1 f a b,c d,e mute sa1r 0.1 f 0.1 f 20 0.1 f enc_b_in audio_mute_filter 0.1 f 0.1 f enc_r_in 0.1 f enc_y_in 0.1 f enc_c_in 0.1 f enc_g_in 0.1 f a b,c b,d,e b,c b,d,e mute sa2r a b,c d,e mute sa1l a mute sa2r sa2l sa2l a mute lpf lpf buf buf mute + 10 f 1k av1_r_out 1 + 10 f 1k av1_l_out 3 sa1r sa1l mute lpf lpf buf buf 6db 6db 6db 6db 6db 6db 6db 6db 6db drv mute mute mute mute mute b c d e f b c d e b e d a a f mute sv13b sv16 sv12b b d e c c b c d f b c d f a f sv11b sv2 sv14 75 + pr_out(component) 75 330 f + pb_out(component) 75 75 75 330 f a b a c b d e f sv1 b a c d sv7 mute sv5 sv6 a b d c sv4 a b d c sv3 a e c a b d e mute mute mute b c d f a e mute sv12a serial ext- ctl1 sv11a sv13a e b: 4v a: 0v c d mute mute mute mute c a b d e enc_pb av3_v av1_v av2_v/y enc_c enc_y+c enc_y enc_r enc_g enc_b av2_b av2_g av2_r/c av3_v av1_v av2_v/y enc_pr enc_py enc_y 6m 12m/13.5m + + clamp clamp 0db 0db serial fss out v-sync. sep. v-sync. sep. lpf 6m 6m a 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 av2_g_in reg2.5v av2_r/c_in gnd_vc v cc 5v_vc av1_b_out av1_fss_out av1_g_out v cc 5v_rgb av1_r/c_out gnd_rgb av2_v_out v cc 5v_vl av1_v/y_out gnd_vl v_out (line) 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 av1_v_in av1_fb_out av2_v/y_in av2_fb_in av3_v_in gnd_vd pb_out (component) v cc 5v_vd pr_out (component) ext_ctl1 py_out (component) v cc 5v_all v cc 12v_a v cc 5v_logic reg2.5v_all sync_sep._filter 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 c_adc v-sync._out y/v_adc sda_in scl_in enc_c_in gnd_logic enc_y_in gnd_v_sw enc_r_in v cc 5v_sw enc_g_in gnd_ref enc_b_in audio_mute_filter ref4.5v 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 a-dac_r_in av2_r_in av1_r_in reg9v_ar gnd_reg a-dac_l_in av2_l_in av1_l_in reg9v_al av2_r_out av2_l_out gnd_ar av1_r_out av1_l_out gnd_al av2_b_in lv7109 pin (for power save) x lv7109 pin (always power on) x scart pin x pin list bold parts are for always power on marks of switches are assigned alphabetically from lsb. ex.) assign 3bit register a=000, b=001, c=010, d=011, e=100, f=101 www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-8/24 test circuit LV7109E + + 48 22 f 0.22 f t56a 0.1 f 0.1 f 75 1k 100k ref4.5v 47 audio_mute_filte 46 enc_b/b-y_in 45 gnd_ref 44 enc_g/y_in 43 v cc 5v_vsw 42 enc_r/r-y_in 41 gnd_vsw 40 enc_y_in 39 gnd_logic 38 enc_c_in 37 scl_in serial clock serial data 36 sda_in 35 y/v_adc 34 v-sync_out 33 c_adc 1 av2_g_in 2 reg 2.5v 3 av2_r/c_in 4 gnd_vc 5 v cc 5v_vc 6 av1_b_out 7 av1_fss_out 8 av1_g_out 9 v cc 5v_rgb 10 av1_r/c_out 11 gnd_rgb 12 av2_v_out 13 v cc 5v_vl 14 av1_v_out 15 gnd_vl 16 v_out(line) av2_b_in gnd_al av1_l_out av1_r_out gnd_ar av2_l_out av2_r_out reg9v_al av1_l_in av2_l_in a-dac_l_in gnd_reg reg9v_ar av1_r_in av2_r_in a-dac_r_in 17 av1_v_in 18 av1_fb_out 19 av2_v/y_in 20 av2_fb_in 21 av3_v_in 22 gnd_vd 23 b-y_out(component) 24 v cc 5v_vd 25 r-y_out(component) 26 ext_ctl1 27 y_out(component) 28 v cc _all5v 29 v cc 12v_a 30 v cc _logic 31 reg2.5v_all 32 sync_sep_lpf 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 t56 t99 0.22 f t53a 1k 100k t53 0.22 f 10 f t52a 1k 100k t52 t57 + 330 f 0.1 f 0.1 f 0.1 f 150 75 75 75 150 75 t11 t37 t32 t31 t34 t33 0.1 f 75 t97 + 330 f 150 2k t7 t13 + 1000 f 150 t14 t2 t10 + + + 47 f 0.01 f 5v 12v + 47 f 0.01 f 0.01 f 0.1 f 75 t95 0.1 f 75 t93 0.1 f 75 180k 3ma t91 10k 10k t83 t16 t49 0.1 f 0.01 f 75 t1 150 t12 10 t27 150 t17 150 t9 150 t28 150 t26 150 t23 t100 0.1 f 75 t3 + 0.22 f t64a 1k 100k t64 0.22 f t61a 1k 100k t61 0.22 f 10 f t60a 1k 10k 100k t60 0.1 f 75 t5 t65 + 4.7 f t74 t74a 10k + 4.7 f t73 t73a 10k + 4.7 f t72 t72a 10k + 4.7 f t71 t71a 10k t82 10k t81 + 1000 f www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-9/24 LV7109E serial control table * indicates initial. address 8 7 6 5 4 3 2 1 symbol input output remarks group 1 0000 0001 video canal-sw video sv1 0 0 0 a p19 av2_v/y_in p10: av1_r/c_out * 0 0 1 b - enc_y+c_mix 0 1 0 c p40 enc_y 0 1 1 d - mute 1 0 0 e - mute 1 0 1 f - mute 1 1 x - - prohibit sv2 0 0 0 a p17 av1_v_in p12: av2_v_out * 0 0 1 b - mute 0 1 0 c - enc_y+c_mix 0 1 1 d mute 1 0 0 e mute 1 0 1 and after - prohibit sv3 0 0 a p17 av1_v_in sv4 0 1 b p19 av2_v/y_in * 1 0 c - n/a 1 1 d - n/a address 8 7 6 5 4 3 2 1 symbol input output remarks group 2 0000 0010 video input-sw sv4 0 0 a p21 av3_v_in sv7 0 1 b - n/a 1 0 c according to sv3 control * 1 1 d - sv5/6 mix sv2 0 0 0 a - mute mute y+c mix sv7 p33: c_adc 0 0 1 b - mute mute 0 1 0 c p19 av2_v/y_in av2_r/c_in 0 1 1 d - mute mute 1 0 0 e - mute mute * 1 0 1 and after - - prohibit prohibit sv3 0 0 a sv5 y p35: y/v_adc 0 1 b sv4 composit video 1 0 c - mute * 1 1 d - mute sv16 note 1) 0 - - through * 1 - - clamp input address 8 7 6 5 4 3 2 1 symbol input output remarks group 3 0000 0011 video other-1 12/27mhz lpf sw 0 - x = 12mhz * 1 - x = 27mhz rgb output 0 - according to g3d3-5 control 1 - switch of sv11b-13b set to ?f? f: av2_rgb (external) * sv11a sv12a sv13a 0 0 0 a - mute p40 enc_y_in - mute p25: pr_out p27: py_out p23: pb_out a: enc_y * 0 0 1 b p42 enc_r_in p44 enc_g_in p46 enc_b_in b: component ( mlpf) 0 1 0 c p42 enc_r_in p44 enc_g_in p46 enc_b_in c: component ( mlpf) 0 1 1 d p42 enc_r_in p44 enc_g_in p46 enc_b_in d: component ( mlpf) 1 0 0 e - mute - mute - mute e: mute 1 0 1 f p42 enc_r_in p44 enc_g_in p46 enc_b_in f: component ( mlpf) 1 1 x - - prohibit - prohibit - prohibit sv11b sv12b sv13b * effective at g3d2 = ?0? 0 0 0 a p42 enc_r_in p44 enc_g_in p46 enc_b_in p10: av1_r/c_out p8: av1_g_out p6: av1_b_out a: enc_rgb (6mlpf) * 0 0 1 b - mute - mute - mute b: mute 0 1 0 c p38 enc_c_in - mute - mute c: enc_c 0 1 1 d - mute - mute - mute d: mute 1 0 0 e - mute - mute - mute e: mute 1 0 1 f p3 av2_r/c_in p1 av2_g_in p64 av2_b_in f: av2_rgb (external) 1 1 x - - prohibit - prohibit - prohibit sv14 0 a - enc_y+c p16: v_out (line) 1 b - mute * n/a 0 a - - - - 1 b - - - - * sv16 note 1) 0 - - through 1 - - bias input * note 1) g2d8/g3d8 = ? 11 ? is prohibited. follow the av2 (16) fb_in (pin32) control in case of through. av2_16pin sv16 h a : clamp input (rgb) l b : bias input (y+c) www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-10/24 * indicates initial. address 8 7 6 5 4 3 2 1 symbol input output remarks group 4 0000 0100 video & audio other-1 n/a 0 a - n/a - n/a * 1 b - n/a - n/a n/a 0 a - n/a - n/a * 1 b - n/a - n/a fb av1 (16) note 2) 0 0 a - 0v p18: av1_fb_out 0 1 b - 5v 1 0 c p20 through * 1 1 d p20 through fss av1 (8) 0 0 - - low (0.5v) p7: av1_fss_out * 0 1 - - mid (6.0v) 1 0 - - high (11.0v) 1 1 - - high (11.0v) n/a 0 - - - * 1 - - - a-mute 0 - - through 1 - - mute p58,59,61,62 output mute * note 2) same polarity as the av2 (16) fb_in (pin20) control in case of through. address 8 7 6 5 4 3 2 1 symbol input output remarks group 5 0000 0101 audio canal-sw sa1l/r 0 0 0 a p55 av2_l_in p50 av2_r_in p62: av1_l_out p61: av1_r_out * 0 0 1 b p54 a-dac_l_in p49 a-dac_r_in 0 1 0 c p54 a-dac_l_in p49 a-dac_r_in 0 1 1 d - mute - mute 1 0 0 e - mute - mute and after 1 0 1 f - prohibit - prohibit sa2l/r 0 0 0 a p56 av1_l_in p51 av1_r_in p59: av2_l_out p58: av2_r_out * 0 0 1 b - mute - mute 0 1 0 c p54 a-dac_l_in p49 a-dac_r_in 0 1 1 d - mute - mute 1 0 0 e - mute - mute 1 0 1 and after - - prohibit - prohibit n/a 0 0 a - n/a - n/a 0 1 b - n/a - n/a 1 0 c - n/a - n/a * 1 1 d - n/a - n/a address 8 7 6 5 4 3 2 1 symbol input output remarks group 6 0000 0110 n/a n/a 0 0 0 a - n/a - n/a 0 0 1 b - n/a - n/a * 0 1 0 c - n/a - n/a 0 1 1 d - n/a - n/a 1 0 0 e - n/a - n/a and after 1 0 1 - - prohibit - prohibit n/a 0 a - n/a 1 b - n/a * n/a 0 0 a - n/a 0 1 b - n/a * 1 0 c - n/a 1 1 - - prohibit n/a 0 0 a - n/a 0 1 b - n/a * 1 0 c - n/a 1 1 - - prohibit address 8 7 6 5 4 3 2 1 symbol input output remarks group 7 0000 0111 n/a 0 0 0 0 0 0 - - n/a 0 0 1 1 0 0 - - n/a 1 1 1 1 1 1 - - n/a * other than above - - prohibit ext-ctl1 0 - - l p26: ext_ctl1 general purpose out1 * 1 - - h changeover of video input bias/clamp - - - - - - - - - p42 enc_r_in p44 enc_g_in p46 enc_b_in input changeover 0 - bias input clamp input bias input component 1 - clamp input clamp input clamp input rgb * www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-11/24 * indicates initial. address 8 7 6 5 4 3 2 1 symbol input output remarks group 8 0000 1000 n/a n/a 0 0 0 0 0 0 - - n/a 0 0 1 1 0 0 - - n/a 1 1 1 1 1 1 - - n/a * other than above - - prohibit n/a 0 - - n/a * 1 - - n/a n/a 0 - - n/a * 1 - - n/a cautions for use 1. drive capacity of video driver line outputs can drive two systems through capacitive coupling. component outputs can drive one sy stems through cap acitive coupling. scart output can drive one system only through dc coupling. 2. audio mute this ic incorporates a mute transistor to reduce the pop noise of audio output when power is turned on/off. mute control can be made by serial control. 3. resistor to limit the audio input when the large signal is input in the input pin with power off, cross-talke between input and output occurs through the protective diode and parasitic elements. b ecause of the structure of lsi, such cross-talke is difficult to avoid. if cross-talk at a time of power off presents a problem, the cross-talk amount can be reduced by inserting the limiting resistor in the input. in this case, the input signal level changes depending on the resistance value. determine the constant while taking both the cross-talk amount and input level into account. 4. pin treatment when external control is not to be used when external control pins (pins 26) are not used, pull-down to gnd is recommended. 5. audio 9v_reg pin external capacitance use the audio 9v_reg pins (pins 52 and 57) external capacitance of 10 f or more and with the equivalent series resistance component of 7 or less. 6. power application and disconnection sequences the recommended power application sequence to this ic is v cc _all5v (pin28) v cc 5v (pins 5, 9, 13, 24, 30 and 43), v cc 12v (pin29). (no particular order is established between v cc 5v and v cc 12v.) it is recommended to reverse the above sequence when power supply is turned off. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-12/24 serial control specification 1. slave address 2. data transfer manual : [1] is high level. [0] is low level. i 2 c-bus control system is adopted in sw lsi. sw lsi is controlled by scl (serial cloc k) and sda (serial data) at first, please set up the start condition *1 by these two terminals (scl and sda). and next, please input the 8bits data, which should be synchronized with scl in to sda terminal. still more, please give priority to high rank bit at data transfer order (msb lsb). the 9th bit is called as ack (acknowle dge), sw lsi sends [0] to the sda terminal during scl [1] period. so, please open the port of microprocessor during this period. lv7107m adopt auto-increment, so you input only first group-address an d you can transfer data in order. as thus the data transfer stop condition *2 is finished. *1 sda rise up during sci is [1] *2 sda fall down during scl is [1] 3. transfer data format the transfer data is composed by star t condition, slave address, group address *4 , data, and stop condition. after setting up the start condition, please transfer the sl ave address (regulated as ?1001000? in sw lsi). group and next control data (please see the fig.1) slave address is composed by 7bits, and this bit 8th bit *5 should be set as [0]. the both of group address and control data are composed by 8bits, and the one control action is defined with combination of these two data. and if you want to control 2 or more groups at the same mode, you can realize it by sending some control data together. the data makes meaning with all bits, so you cannot stop the sending until all data transfer is over. but lv7107m adopt auto-increment, for example you can stop to transfer stop co ndition after group 2 data. if you want to stop transfer action, pleas e transfer the stop condition without fail. *4 there are 8 control groups. *5 this 8th bit called as r/w bit, and this bit shows the data transmission di rection. [0] means send mode (accept mode with sw lsi) and [1] means accept mode (send m ode with sw lsi) fundamentally. but sw lsi is not equipped with such a data out function, please keep this bit as [0]. fig. 1 data structure 1 msb slave receiver one-way communication (this ic is dedicated to receive) lsb 0010100 r/w ack ack ack ..... stop condition start condition acknowledge start condition slave address group address control data stop condition www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-13/24 4. initialize and others sw lsi is initialized as the following mode for ci rcuit protection. please see ?serial control table?. characteristics of the sda and scl 1/0 stages for sw lsi parameter symbol min max unit low level input voltage v il 0 0.8 v high level input voltage v ih 3.0 5.0 v low level output current i ol 3.0 ma scl clock frequency f scl 400 khz set-up time for a repeated start condition t su : sta 0.6 s hold time start condition. after this peri od, the first clock pulse is generated. t hd : sta 0.6 s low period of the scl clock t low 1.3 s rise time of both sda and sdl signals t r 0 0.3 s high period of the scl clock t high 0.6 s fall time of both sda and sdl signals t f 0 0.3 s data hold time: t hd : dat 0 0.9 s data set-up time t su : dat 100 ns set-up time for stop condition t su : sto 0.6 s bus fredd time between a stop and start condition t buf 1.3 s fig.2 definition of timing. t su :sto t su :dat t f t r t hd :dat t low t high t hd :sta t su :sta scl 37pin sda 36pin t buf www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-14/24 pin function pin no. pin name dc voltage signal wave form input/output form note p1 av2_g_in 1.6vdc +green 0.7vp-p 1.6vdc 1k 4k 4k 300 300 1 p2 reg2.5v 2.5vdc dc 300 50 22.8k 23k 18.5k 18.5k 910 30k 13k 6.8k 10pf 50 2 p3 av2_r/c_in 1.6vdc +red 0.7vp-p 1.6vdc 20k 1k 4k 4k 300 300 3 2.1vdc +chroma 0.7vp-p 2.1vdc p4 gnd_vc p5 v cc 5v_vc p6 av1_b_out 0.5v +blue 1.4vp-p 0.5vdc 6 10.7k 10k 2k 100 200 3.3pf 1.25pf 1.25pf continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-15/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p7 av1_fss_out low : 0.5v mid : 6.0v high : 11.1v dc 100k 7 p8 av1_g_out 0.5vdc +green 1.4vp-p 0.5vdc 8 10.7k 10k 2k 100 200 3.3pf 1.25pf 1.25pf p9 v cc _rgb p10 av1_r/c_out 0.5vdc +red 1.4vp-p 0.5vdc 10 10.7k 10k 2k 100 200 3.3pf 1.25pf 1.25pf 1.7vdc +chroma 1.4vp-p 1.7vdc p11 gnd_rgb p12 av2_v_out 0.5vdc +video 2.0vp-p 0.5vdc 12 10.7k 10k 2k 100 200 3.3pf 1.25pf 1.25pf p13 v cc 5v_vl continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-16/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p14 av1_v/y_out 0.5vdc +video 2.0vp-p 0.5vdc 14 10.7k 10k 2k 100 200 3.3pf 1.25pf 1.25pf 0.5vdc +y 2.0vp-p 0.5vdc p15 gnd_vl p16 v_out (line_out) 0.7vdc +cvbs 2.0vp-p 0.7vdc 100k 16 10.4k 10k 2k 100 100 3pf 3pf 3pf p17 av1_v_in 1.6vdc +cvbs 1.0vp-p 1.6vdc 1k 4k 4k 300 300 17 p18 av1_fb_out low : 0v high : 4.0v through : 0/4.0v 4.0vp-p 0vdc 10 1k 1k 1k 100k 1k 18 continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-17/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p19 av2_v/y_in 1.6vdc +cvbs 1.0vp-p 1.6vdc 1k 4k 4k 300 300 19 1.6vdc +y 1.0vp-p 1.6vdc p20 av1_fb_in low : 0v high : 2v 2vdc 0vdc 1k 20 p21 av3_v_in 1.6vdc +cvbs 1.0vp-p 1.6vdc 1k 4k 4k 300 300 21 p22 gnd_vd p23 pb_out (component) 1.7v +pb 1.4vp-p 1.7vdc 100k 23 10.7k 10k 2k 100 200 3.3pf 1.25pf 1.25pf p24 v cc 5v_vd continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-18/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p25 pr_out (component) 1.7v +pr 1.4vp-p 1.7vdc 100k 25 10.7k 10k 2k 100 200 3.3pf 1.25pf 1.25pf p26 ext-ctl1 (out) low : 0v high : 5v 26 p27 py_out (component) 0.7vdc +py 2.0vp-p 0.7vdc 5k 27 p28 v cc 5v_all p29 v cc 12v_a p30 v cc 5v_logic p31 reg2.5v_all 2.5vdc dc 300 50 22.8k 23k 18.5k 18.5k 910 13k 30k 6.8k 10pf 50 31 p32 sync_sep _filter 2.2vdc +y 1.0vp-p 2.2vdc 32 40k 500 500 8pf continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-19/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p33 adc_c_out 2.1vdc +chroma 0.7vp-p 2.1vdc 33 500 p34 v_sync_out low : 0.3v high : 4.7v 0.3vdc 4.7vdc 34 300 300 p35 adc_v/y_out 1.0vdc +cvbs 1.0vp-p 1.0vdc 35 500 1.0vdc +y 1.0vp-p 1.0vdc p36 sda_in i 2 c data 30k 500 36 ack_out p37 scl_in i 2 c clock 30k 500 37 continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-20/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p38 enc_c_in 2.1vdc +chroma 0.7vp-p 2.1dc 4k 4k 20.3k 300 38 p39 gng_logic p40 enc_y_in 1.6vdc +y 1.0vp-p 1.6vdc 1k 4k 4k 300 300 40 p41 gnd_vsw p42 enc_r/pr_in 1.6vdc +red 0.7vp-p 1.6vdc 20k 1k 4k 4k 300 300 42 2.1vdc +pr 0.7vp-p 2.1vdc p43 v cc 5v_sw p44 enc_g/py_in 1.6vdc +green 0.7vp-p 1.6vdc 1k 4k 4k 300 300 44 1.6vdc +py 1.0vp-p 1.6vdc p45 gng_ref continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-21/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p46 enc_b/pb_in 1.6vdc +blue 0.7vp-p 1.6vdc 20k 1k 4k 4k 300 300 46 2.1vdc +pb 0.7vp-p 2.1vdc p47 audio_mute_filter 47 140k 60k 500 p48 ref4.5v 4.5vdc dc 60k 60k 1k 48 52 p49 a-dac_r_in 4.5vdc +right 5.6vp-p-max 4.5vdc 49 100k 4.5v 1k p50 av2_r_in 4.5vdc +right 5.6vp-p-max 4.5vdc 50 100k 4.5v 1k continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-22/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p51 av1_r_in 4.5vdc +right 5.6vp-p-max 4.5vdc 51 100k 4.5v 1k p52 reg9v_ar 9vdc dc 100 50 141k 23k 52 p53 gnd_reg p54 a-dac_l_in 4.5vdc +left 5.6vp-p-max 4.5vdc 54 100k 4.5v 1k p55 av2_l_in 4.5vdc +left 5.6vp-p-max 4.5vdc 55 100k 4.5v 1k p56 av1_l_in 4.5vdc +left 5.6vp-p-max 4.5vdc 56 100k 4.5v 1k continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E no.a1992-23/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p57 reg9v_al 9vdc dc 100 50 141k 23k 57 p58 av2_r_out 4.5vdc +right 5.6vp-p-max 4.5vdc 20k 4.5v 58 700 100 p59 av2_l_out 4.5vdc +left 5.6vp-p-max 4.5vdc 20k 4.5v 59 700 100 p60 gnd_ar p61 av1_r_out 4.5vdc +right 5.6vp-p-max 4.5vdc 20k 4.5v 61 700 100 p62 av1_l_out 4.5vdc +left 5.6vp-p-max 4.5vdc 20k 4.5v 62 700 100 p63 gnd_al continued on next page. www.datasheet.co.kr datasheet pdf - http://www..net/
LV7109E ps no.a1992-24/24 continued from preceding page. pin no. pin name dc voltage signal wave form input/output form note p64 av2_b_in 1.6vdc +blue 0.7vp-p 1.6vdc 1k 4k 4k 300 300 64 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliab ility pr oducts, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these pr obab ilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. this catalog provides information as of november, 201 1. specifications and information herein are subject to change without notice. www.datasheet.co.kr datasheet pdf - http://www..net/

▲Up To Search▲

Price & Availability of LV7109E

	To Download LV7109E Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .